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A direct-mapped cache with 4 lines is initially empty. The memory blocks 0, 8, 0, 6, 8 are accessed in this order. How many of these access…

2186Medium DSSSB TGT Computer Science 0 replies 1 views
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A direct-mapped cache with 4 lines is initially empty. The memory blocks 0, 8, 0, 6, 8 are accessed in this order. How many of these accesses are misses?

  • A5
  • B4
  • C3
  • D2
Correct answer: A

Explanation

Blocks 0 and 8 both map to line 0 (block mod 4), so they keep evicting each other; 6 maps to line 2 and misses on its first access, giving 5 misses.
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