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A pipelined processor has an ideal CPI of 1. 20% of its instructions are branches, and every branch causes 2 stall cycles. There are no oth…

2320Medium DSSSB TGT Computer Science 0 replies 1 views

A pipelined processor has an ideal CPI of 1. 20% of its instructions are branches, and every branch causes 2 stall cycles. There are no other stalls. What is the effective CPI?

A1.4
B1.2
C1.6
D2.0

Correct answer: A

Explanation

Effective CPI = 1 + (0.20 × 2) = 1.4.

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