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A device transfers data at 4 × 10⁶ bytes per second. The DMA controller moves 4-byte words by cycle stealing, and the memory cycle time is…

2390Medium DSSSB TGT Computer Science 0 replies 1 views

A device transfers data at 4 × 10⁶ bytes per second. The DMA controller moves 4-byte words by cycle stealing, and the memory cycle time is 100 ns. What percentage of the memory cycles is taken by the DMA transfers?

A4%
B40%
C10%
D1%

Correct answer: C

Explanation

The device produces 10⁶ words per second, so 10⁶ cycles are stolen out of the 10⁷ memory cycles available each second, i.e. 10%.

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